Produkt mají v nabídce:
Designing Digital Computer Systems with Verilog - Lilja, David J. (University of Minnesota) a Sapatnekar, Sachin S. (University of Minnesota)
This is both an introduction to computer architecture and a guide to using a hardware description language (HDL) to design a simple processor. The authors demonstrate how behavioural and structural models can be developed using the popular Verilog HDL. For senior and graduate students, and practising engineers.
